Phase and amplitude control circuit for wide band amplifiers



' March 15, 1949. MAHONEY, JR 2,464,594 I PHASE AND AMPLITUDE/CONTROL CIRCUIT FOR WIDE BAND AfiPLlFIERS Filed April 6, 1946 FIG. I

I INVERTED OUTPUT ZERO 0R ELAN/(ED OUTPUT POLAR/TY UNCHANGED li l i P IN 5 N TOR V J. J, MA HONEY JR.

ATTORNEY Patented Mar. 15, 1949 PHASE AND AMPLITUDE CONTROL CIRCUIT FOR WIDE BAND AMPLIFIERS John J. Mahoney, Jr., Lynbrook, N. Y., assignor to Bell Telephone Laboratories, Incorporated, New York, N. Y., a corporation of New York Application April 6, 1946, Serial No. 660,030

4 Claims.

This invention relates to combined voltage and polarity control circuits for wide band video amplifiers. An object of the invention is to selectively derive an output voltage of a like and/or unlike polarity or a blanked signal (zero amplitude) from an unbalanced input voltage.

An object of the invention is to provide a phase reversing circuit, which simultaneously combines gain control with polarity control.

An object of the invention is .to selectively derive a polarity inverted, blanked or unchanged polarity signal over a wide band of frequencies extending from a few cycles to the megacycle range and to continuously change the amplitude of the derived signal.

Another object of the invention is to effectively and efficiently couple an unbalanced circuit to a balanced circuit over a wide band of frequencies (for example, 10 cycles to 10 megacycles or more) by means of a cathode phase control network including equal resistors.

A feature of the invention is the provision of a cathode phase reversing and control circuit, comprising a 11' network of resistors, two of which are series connected and equal in value to constitute a fixed voltage divider, while the third is a potentiometer constituting a variable voltage divider.

Another feature of the invention is a balancedto-unbalanced circuit coupling, comprising a pair of equal resistors serially connected to the cathodes of a pair of amplifier tubes.

Polarity control circuits heretofore used in cathode ray oscilloscope circuits, or in connecting an unbalanced to a balanced circuit, have commonly suffered from the limitation that as the frequency range was extended, for example, into the .megacycle range, unbalances of the order of 25 per cent or more would be encountered due to-parasitic capacitances, feedback or the like, whereby operation above 4 or megacycles would become unsatisfactory.

In accordance with one embodiment of the invention, a simple phase control circuit is provided, operable over a wide band of frequencies extending into the megacycle range and beyond, featured by a 1r network of equal resistors connected in the cathode lead of a vacuum tube, one thereof constituting tapped potentiometer, whereby a phase inverted, phase unchanged or zero signal may be derived from an unbalanced input signal with concomitant amplitude control of the derived signal.

In accordance with another embodiment of the invention, a balanced to unbalanced circuit coupling is provided efiective over a band width of the order of megacycles or more, characterized by a pair of serially connected equal resistors R, operating as a fixed Voltage divider in the oathode leads of a pair of vacuum tubes, whereby signals of equal magnitude and opposite polarity are derived in the anode circuits thereof.

Referring to the figures of the drawing:

Fig. 1 shows a circuit in accordance with the invention;

Figs. 2A, 2B, 2C are circuits showing various states of operation of the embodiment of Fig. 1; and

Fig. 3 shows a modified circuit arrangement adapted for unbalanced to balanced circuit oper ation.

In the embodiment of the invention illustrated in Fig. 1, an output signal of inverted polarity or of like polarity, controllable in amplitude or a blanked (zero) signal may be selectively derived at terminals 3, 4 depending on the position of the variable tap 5 of potentiometer P.

Referring to the circuit embodiment illustrated in Fig. 1, an unbalanced input signal voltage applied to terminals l, 2 of a pentode amplifier H is connected to the signal grid thereof. The input signal voltage may be a complex wave, for example, a short time rectangular pulse of the order of 5 milliseconds to /2 microsecond. With the constants shown, the circuit of Fig. 1 will have a constant transmission and time delay for frequencies from about 10 cycles to at least 10 megacycles. The output voltage from amplifier I 1 taken from the variable tap 5, is applied to the grid of a similar second pentode 12.

A 1r network of equal resistors R connects the cathode leads .of the two pentodes l I, I2 to ground as shown in Fig. l. A pair of said equal resistors R are serially connected to constitute a fixed voltage divider, while the third resistor R constitutes a potentiometer P, having variable tap 5. The polarity of the voltage derived at terminals 3, l, 1. e., between the anode of pentode l2 and ground, will depend essentially on three positions of the tap 5, to wit,

(I) At the grounded end of P. it will be unchanged;

(II) At the upper end of P, it will be inverted; and

(III) At the center position, the signal itself is blanked out.

The nature of the operation of the circuit embodiment of Fig. 1 may be more fully and. clearly apprehended from the circuit diagrams of Figs.

3 2A, 2B, 2C, which show the efiect on polarity of shifting the potentiometer tap positions aforementioned (i. e., I, II, III).

Fig. 2A illustrates how an inverted polarity is produced when the tap is at the upper extremity (ungrounded end) of the potentiometer P. The input voltage, which may for example be a rectangular pulse of +1 volt, is directly applied tothe signal grid a as illustrated in Fig. 2A. Cathode b is raised to a potential of /2 volt by the signal, due to the voltage divider, comprising the equal pair of resistors R connected in series.

Accordingly, with respect to the cathode terminal b, the relative grid potential is volt. This difference of potential between grid 0, and cathode 2) produces a plate voltage GMRL (a-)' or GMRL volt), i. e., a reversal in polarity of the input wave form. GM represents the tube transconductance R1,, the plate load resistance, (ab) the diiierence in voltage between points a, b. The product GMRL will be recognized as an approximate expression for the gain of a pentod'e.

Fig. 20 illustrates how the polarity will be un changed when the tap is at the grounded extremity of potentiometer P. The input signal may be a complex wave, for example, a rectangular pulse of +1 volt applied across potentiometer resistor R. The signal grid is held at ground potential by the tap connection shown. Point 2) of the cathode is at volt due to the fixed voltage divider action. Accordingly, relative to the cathode, the grid is at /2 volt, which produces at the plate a voltage GMRL (ab) or GMRL /2 volt) i. e., /2 GMRL, which represents an unchanged polarity for the output signal as illustrated by the output wave form in Fig. 20.

Fig. 25 illustrates how a blanked signal (zero amplitude) may be derived from a complex wave input, by setting the potentiometer tap 5 at the center. Points a, b are each raised to volt, with respect to ground. The plate voltage GMR.L (a-b) becomes, therefore, zero since (al1) =0.

Thus, the positioning of the tap 5 of the potentiometer P at three critical positions, produces selectively a signal of reversed polarity, unchanged polarity or a blanked out signal from a complex Wave input as summarized in the accompanying Table A:

Ta le A Potentiometer Tap Position Cathode 1) Grid a 11-h Output 3-4 Volts Volts Volts I Grounded and O Unchanged polarity. II Ungrounded and 1 In verted polarity. III Center A 0 No signal.

4 balanced input over a wide band of frequencies (10 cycles to 10 megacycles or more).

In the embodiment of Fig. 3, a pair of like pentode tubes H, [2 are connected together in the manner illustrated, featured by a pair of equal resistors R serially connected to ground as shown. The cathode terminals b, b are connected by a lead. The grid of the second tube is grounded, i. e., the potential at a is held at zero.

It should be noted that some circuit elements not essential to the invention have been omitted for clarity and simplicity of disclosure or shown with no values. The expressions for signals at various points indicated are not general but are limited to circuits where low resistances are employed and tubes having high plate resistance and amplification are assumed. Electrode voltages necessary to the normal operation of the tubes and circuits for supplying them have been neglected as being known to those skilled in these arts.

The unbalanced input signal,. represented as a rectangular pulse of +1 volt, is applied to the grid of the first pentode at a, whereupon balanced voltages i. e., of equal and opposite polarity, may be derived at the anodes and taken offrespectively at terminals l3, [4 for any well-known purpose.

The manner of operation of the circuit embodiment illustrated in Fig. 3 may be readily comprehended from the foregoing analysis pertaining to Figs. 2A, 20. Thus, the complex wave applied to point a will appear as a signal of reversed polarity in the plate circuit at 1'3 of pentode II as explained for Fig. 2A.

Cathode terminals b and b are each at volt, while grid a. of tube [2 is at zero potential. Therefore, a signal of unchanged polarity will appear at terminal M, as demonstrated previously for Fig. 2C.

The balanced voltages appearing at terminals l3 and M may be applied to the deflecting plates of a cathode ray oscilloscope or to a balanced circuit of the various types known to the art.

It should be noted thatin the-form of circuit illustrated in Fig. 3, a resistance R could be bridged across the input without altering the operation thereof essentially. The inclusion thereof would provide a 1r network of equal resistors R, similar to that illustrated in Fig. 1. However, for the result contemplated in Fig. 3, such a bridging resistor would be preferably omitted with resultant simplification in circuit parts.

It should be understood. that triodes or other suitable tubes may be used in lieu of the pentodes shown herein.

What is claimed is:

1. In combination, a pair of space discharge tubes each having a cathode, an anode and acontrol electrode, a signal input circuit for one of said space discharge tubes including a first resistor connected between the cathode thereof and a point of substantially fixed signal potential, 2. second resistor connected between the cathode of the other tube and said point, a third resistor connected between the cathodes; of said tubes, a signal transmitting connection between a tap on said first resistor and the control electrode of said other tube, and a signal output circuit for said other tube.

2. A signal translating circuit comprising a pair of amplifier tubes each having a cathode, an anode and control electrode, a signal input circuit for one of said tubes, asi gnal output circuit for the other of said tubes, acoupling circuit comprising a 1r network of substantially equal resistance elements, a first of said resistance elements being connected in series in said input circuit, a second being connected in series in said output circuit, and the third being connected between the two cathodes, and a signal transmitting connection between a tap on said first resistance element and the control electrode of said other tube.

3. A circuit in accordance with the preceding claim, wherein said tap on said first resistance element is variable.

4. A circuit in accordance with claim 2 in which said first resistance element is included in series in both said input circuit and the anode circuit of said one tube.

JOHN J. MAHONEY, JR.

REFERENCES CITED The following references are of record in the file of this patent:

UNITED STATES PATENTS 10 Number Name Date 2,200,055 Burnett May 7, 1940 2,289,301 Barbour July '7, 1942 2,368,454 Dome Jan. 30, 1945 

